Systolic Hardware Implementation for the Montgomery Modular Multiplication
نویسنده
چکیده
Modular multiplication is a cornerstone computation in public-key cryptography systems such as RSA cryptosystem. The operation is time consuming for large operands. This paper describes the characteristics of a systolic array-based architecture to implement modular multiplication using the fast Montgomery algorithm. The paper evaluates the prototype using the time×area classic factor. Key-Words:Modular multiplication, Systolic architecture, Cryptosystems.
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